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    SubjectRe: [PATCH 0/9] -tip/apic merging one more series
    please check if you need { } otherwise you broke 64 bit


    static int lapic_resume(struct sys_device *dev)
    {
    unsigned int l, h;
    unsigned long flags;
    int maxlvt;

    if (!apic_pm_state.active)
    return 0;

    maxlvt = lapic_get_maxlvt();

    local_irq_save(flags);

    #ifdef CONFIG_X86_64
    if (x2apic)
    enable_x2apic();
    else
    #endif
    /*
    * Make sure the APICBASE points to the right address
    *
    * FIXME! This will be wrong if we ever support suspend on
    * SMP! We'll need to do this as part of the CPU restore!
    */
    rdmsr(MSR_IA32_APICBASE, l, h);
    l &= ~MSR_IA32_APICBASE_BASE;
    l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr;
    wrmsr(MSR_IA32_APICBASE, l, h);


    YH


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