Messages in this thread | | | Date | Thu, 14 Aug 2008 13:46:12 -0400 | From | Mathieu Desnoyers <> | Subject | Re: [RFC PATCH] x86 alternatives : fix LOCK_PREFIX race with preemptible kernel and CPU hotplug |
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* H. Peter Anvin (hpa@zytor.com) wrote: > Jeremy Fitzhardinge wrote: >>> Xeon 2.0GHz >>> >>> >>> Summary >>> >>> no lock prefix (s) with lock prefix (s) Speedup >>> make -j1 kernel/ 33.94 +/- 0.07 34.91 +/- 0.27 2.8 % >>> hackbench 50 2.99 +/- 0.01 3.74 +/- 0.01 25.1 % >>> >> Yeah, that's more severe than I would have expected. Perhaps I have AMD >> numbers in my head. > > He doesn't specify what kind of Xeon it is (there are three completely > different CPUs under the Xeon brand name: P3 Xeon, P4 Xeon, and Core 2 > Xeon), but I think it's a P4 Xeon. > > Netburst sucked in so many ways, and this is one of them. >
Here are the specs. It's a brand new 64bits dual quad-core (Christmas in August) :-) None of the specs seems to talk about neither Core2 or Pentium 4 though. Those appellations seems to hold for desktop processors, not server processors...
processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 23 model name : Intel(R) Xeon(R) CPU E5405 @ 2.00GHz stepping : 6 cpu MHz : 2000.109 cache size : 6144 KB physical id : 0 siblings : 1 core id : 0 cpu cores : 1 apicid : 0 initial apicid : 0 fpu : yes fpu_exception : yes cpuid level : 10 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc up arch_perfmon pebs bts rep_good pni monitor ds_cpl vmx tm2 ssse3 cx16 xtpr dca sse4_1 lahf_lm bogomips : 4000.21 clflush size : 64 cache_alignment : 64 address sizes : 38 bits physical, 48 bits virtual power management:
Booting processor 7/7 ip 6000 Initializing CPU#7 Calibrating delay using timer specific routine.. 4000.26 BogoMIPS (lpj=8000538) CPU: L1 I cache: 32K, L1 D cache: 32K CPU: L2 cache: 6144K CPU: Physical Processor ID: 1 CPU: Processor Core ID: 3 CPU7: Intel(R) Xeon(R) CPU E5405 @ 2.00GHz stepping 06 checking TSC synchronization [CPU#0 -> CPU#7]: passed.
Mathieu
> -hpa > >
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