Messages in this thread | | | Date | Thu, 10 Jul 2008 11:45:26 -0500 | From | Christoph Lameter <> | Subject | Re: [RFC 00/15] x86_64: Optimize percpu accesses |
| |
H. Peter Anvin wrote:
> It will, but it might still be a net loss due to higher load on the TLB > (you're effectively using the TLB to do the table lookup for you.) On > the other hand, Mike points out that once we move away from fixed-sized > segments we pretty much have to use virtual addresses anyway(*).
There will be no additional overhead since the memory already mapped 1-1 using 2MB TLBs and we want to use the same for the percpu areas. This is similar to the vmemmap solution.
>> The first percpu area would ideally be the per cpu segment generated >> by the linker. >> >> How would that fit into the address map? In particular the 2G distance >> between code and the first per cpu area must not be violated unless we >> go to a zero based approach. > > If with "zero-based" you mean "nonzero gs_base for the boot CPU" then > yes, you're right. > > Note again that that is completely orthogonal to RIP-based versus absolute.
?? The distance to the per cpu area for cpu 0 is larger than 2G. Kernel wont link with RIP based addresses. You would have to place the per cpu areas 1TB before the kernel text.
| |