Messages in this thread |  | | From | Rusty Russell <> | Subject | Re: [patch 04/41] cpu ops: Core piece for generic atomic per cpu operations | Date | Tue, 17 Jun 2008 10:24:40 +1000 |
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On Tuesday 17 June 2008 00:52:08 Christoph Lameter wrote: > On Sun, 15 Jun 2008, Rusty Russell wrote: > > > 3. Some hooks for arches to override particular behavior as needed. > > > F.e. IA64 allocates percpu structures in a special way. x86_64 > > > needs to do some tricks for the pda etc etc. > > > > IA64 is going to need some work, since dynamic percpu addresses won't be > > able to use their pinned TLB trick to get the local version. > > The ia64 hook could simply return the address of percpu area that > was reserved when the per node memory layout was generated (which happens > very early during node bootstrap).
Apologies, this time I read the code. I thought IA64 used the pinned TLB area to access per-cpu vars under some circumstances, but they only do that via an arch-specific macro.
So creating new congruent mappings to expand the percpu area(s) is our main concern now?
Rusty.
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