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    SubjectRe: [patch 3/6] x86: use cpuinfo to check for interrupt pending message msr
    On Fri, 13 Jun 2008, Andreas Herrmann wrote:
    > > + /* Family 0x0f models < rev F do not have this MSR */
    > > + if (c->x86 == 0x0f && c->x86_model < 0x40)
    > > + return 0;
    >
    > Just some minor nitpicking.
    > Older AMD family 0xf CPUs have this Interrupt Pending Message
    > Register. But they do not support C1E and thus bits 27 and 28 of this
    > MSR are reserved.

    So the check can be simplified to always check the MSR for all
    family >= 0x0f CPUs ?

    Thanks,

    tglx


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