Messages in this thread | | | Subject | Re: MMIO and gcc re-ordering issue | From | Benjamin Herrenschmidt <> | Date | Fri, 30 May 2008 08:05:39 +1000 |
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On Thu, 2008-05-29 at 14:48 -0700, Trent Piepho wrote:
> I wrote a JTAG over gpio driver for the powerpc MPC8572DS platform. With the > non-raw io accessors, the JTAG clock can run at almost ~9.5 MHz. Using raw > versions (which I had to write since powerpc doesn't have any), the clock > speed increases to about 28 MHz. So it can make a very significant different.
Yes, sync's can hurt a lot. This is why I initially tried to get more relaxed semantics.
We could implement something like __ variants and do something that would still have eieio's but not sync's for example (ie. MMIOs are still ordered vs. each other but not vs. coherent memory).
Ben.
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