Messages in this thread | | | Date | Mon, 28 Apr 2008 21:38:31 +0200 | From | Gabriel C <> | Subject | Re: [PATCH] x86_32: trim memory by updating e820 v3 |
| |
Yinghai Lu wrote: > On Mon, Apr 28, 2008 at 7:24 AM, Gabriel C <nix.or.die@googlemail.com> wrote: >> Mika Fischer wrote: >> > Hi Ingo, >> > >> > I'm having the same problem. >> > >> > Ingo Molnar schrieb: >> >> excellent. So just to make sure: this box never had proper graphics >> >> under Linux (under no previous kernel), due to the way the BIOS has set >> >> up the MTRR's, right? >> > >> > Well, not quite. X still works fine, but since the video memory is >> > overlapped by two of the existing MTRRs, X cannot add a write-combining >> > range for the video memory. That makes X rather slow especially if you >> > use DRI for Compiz etc. >> >> Well you are lucky then :) >> >> Yeah X 'worked' but it worked as slow as with vesa video driver here. > > [ 0.000000] rangeX: 0000000000000000 - 00000000d0000000 > [ 0.000000] Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB > [ 0.000000] Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB > [ 0.000000] Setting variable MTRR 2, base: 3072MB, range: 256MB, type WB > [ 0.000000] range0: 00000000cf800000 - 00000000cf800000 > [ 0.000000] range: 00000000cf800000 - 00000000d0000000 > [ 0.000000] Setting variable MTRR 3, base: 3320MB, range: 8MB, type WB > [ 0.000000] range0: 0000000100000000 - 0000000120000000 > [ 0.000000] Setting variable MTRR 4, base: 4096MB, range: 512MB, type WB > [ 0.000000] range: 0000000120000000 - 0000000130000000 > [ 0.000000] Setting variable MTRR 5, base: 4608MB, range: 256MB, type WB > [ 0.000000] hole: 000000012c000000 - 0000000130000000 > [ 0.000000] Setting variable MTRR 6, base: 4800MB, range: 64MB, type UC > > so your X server need two entries for WB? > > can you send out /proc/mtrr with booting with disable_mtrr_cleanup?
I can just not right now , cannot reboot the box yet. In about 1h or so , maybe less.
> > YH >
Gabriel
| |