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SubjectRe: [PATCH]: Fix SMP-reordering race in mark_buffer_dirty
On Wed, 2 Apr 2008, Linus Torvalds wrote:

> On Wed, 2 Apr 2008, Linus Torvalds wrote:
> >
> > Core 2 is the outlier in having a noticeably faster "mfence" than atomic
> > instructions
>
> Side note: mfence is probably faster than 6 cycles on Core 2. I've seen it
> be basically zero-cost. Try adding a few memory ops around it - the timing
> will probably change. Core 2 has this odd behaviour that it sometimes does
> worse on the *really* trivial things that don't happen in real life.
>
> Linus

When I added memory reads around mfence, the combined result was worse
than the sum of reads and mfence --- mfence alone 8 ticks, mfence+4reads
18 ticks.

mfence+writes scales linearly, i.e. mfence + 4 writes does 12 ticks.

mfence can fully overlap with register operations.

Mikulas


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