Messages in this thread | | | Subject | RE: Mapping PCI BAR through /sys/devices/pci* sets cache-disable andwrite-through | Date | Wed, 16 Apr 2008 15:23:25 -0700 | From | "Pallipadi, Venkatesh" <> |
| |
>-----Original Message----- >From: linux-kernel-owner@vger.kernel.org >[mailto:linux-kernel-owner@vger.kernel.org] On Behalf Of Keith Packard >Sent: Wednesday, April 16, 2008 10:40 AM >To: linux-kernel >Subject: Mapping PCI BAR through /sys/devices/pci* sets >cache-disable andwrite-through > >The X server recently (within the last year) switched from mapping the >frame buffer from /dev/mem to using /sys/devices/pci*. This caused a >significant memory bandwidth reduction for writes, similar to >the effect >caused when the associated MTRR is set to UC instead of WC. > >Looking at the code path, we find, in i386:pci_mmap_page_range: > > prot = pgprot_val(vma->vm_page_prot); > if (boot_cpu_data.x86 > 3) > prot |= _PAGE_PCD | _PAGE_PWT; > vma->vm_page_prot = __pgprot(prot); > >Which is to say, on any CPU which supports it, force the cache-disable >and write-through bits on. > >Is there some reason this is there? Surely applications should be >expected to set these attributes correctly, currently using MTRR and in >the future, using PAT directly. >
Setting flags "_PAGE_PCD | _PAGE_PWT" maps to PAT_3 which is "UC". So, the mapping X server will get is UC and if X sets MTRR to WC, it will not have any effect on this mapping, which will be still UC. There may be apps which depend on this /sys/ interface giving UC mapping always...
With PAT patches, we now have /sys/devices/pci*resource_wc (in addition to resource) for any PREFETCHABLE region. So, X has to change to use that new interface to get WC mapping.
Thanks, Venki
| |