Messages in this thread | | | Date | Wed, 16 Apr 2008 03:02:52 +0200 | From | Ingo Molnar <> | Subject | Re: [patch] mm: sparsemem memory_present() memory corruption fix |
| |
* Yinghai Lu <yhlu.kernel@gmail.com> wrote:
> On Tue, Apr 15, 2008 at 5:44 PM, Ingo Molnar <mingo@elte.hu> wrote: > > > > * Yinghai Lu <yhlu.kernel@gmail.com> wrote: > > > > > > + unsigned long max_arch_pfn = 1ULL << (MAX_PHYSMEM_BITS-PAGE_SHIFT); > > > > > > > > and also check my analysis whether it is correct and whether it > > > > matches the reported bug patterns. But otherwise the fix looks like > > > > a safe fix for v2.6.25-final to me - it only filters out values > > > > from sparsemem input that are nonsensical in the sparsemem > > > > framework anyway. > > > > > > > > can you check why find_max_pfn() e820_32.c need to call > > > memory_present? wonder if it can be removed. > > > > this is the only call to memory_present() we do in 32-bit arch setup, so > > it's required. > > > > (the function find_max_pfn() is woefully misnamed, but that's a cleanup > > - i just fixed this in x86.git.) > > 64 bit is calling that via paging_init > ==>sparse_memory_present_with_active_regions(MAX_NUMNODES). > > and > void __init sparse_memory_present_with_active_regions(int nid)
yeah - 64-bit is different here and it's not affected by the problem because there SECTION_SIZE_BITS is 27 (==128 MB chunks), MAX_PHYSADDR_BITS is 40 (== 1 TB) - giving 8192 section map entries. Once larger than 1 TB 64-bit x86 systems are created MAX_PHYSADDR_BITS needs to be increased.
The only downside of the current setup on 64-bit is that it wastes 128K of RAM on the majority of systems. We could perhaps try a shift of 28, which halves the footprint to 64K of RAM, and which still is good enough to allow the PCI aperture to remain a hole on most systems. It would also compress the data-cache footprint of the sparse memory maps. (without having to use sparsemem-extreme indirection)
Ingo
| |