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Subject[PATCH 4/5] FRV: Make NOMMU-mode work with base addresses other than 0xC0000000 [try #2]
Date
From: David Howells <dhowells@redhat.com>

Make NOMMU-mode work with base addresses other than 0xC0000000 by:

(1) Giving the code that sets up the protection registers the right address
in __sdram_base. Rather than being hard coded to 0xC0000000, the value
of __page_offset is obtained from the linker script.

(2) Eliminate the check in __switch_to() that verifies the current thread
info is in the 0xCxxxxxxx region.

Signed-off-by: David Howells <dhowells@redhat.com>
---

arch/frv/kernel/head.inc | 2 +-
arch/frv/kernel/switch_to.S | 7 -------
2 files changed, 1 insertions(+), 8 deletions(-)


diff --git a/arch/frv/kernel/head.inc b/arch/frv/kernel/head.inc
index d424cd2..bff6662 100644
--- a/arch/frv/kernel/head.inc
+++ b/arch/frv/kernel/head.inc
@@ -46,5 +46,5 @@
#ifdef CONFIG_MMU
__sdram_base = 0x00000000 /* base address to which SDRAM relocated */
#else
-__sdram_base = 0xc0000000 /* base address to which SDRAM relocated */
+__sdram_base = __page_offset /* base address to which SDRAM relocated */
#endif
diff --git a/arch/frv/kernel/switch_to.S b/arch/frv/kernel/switch_to.S
index b5275fa..b066686 100644
--- a/arch/frv/kernel/switch_to.S
+++ b/arch/frv/kernel/switch_to.S
@@ -102,13 +102,6 @@ __switch_to:
movgs gr14,lr
bar

- srli gr15,#28,gr5
- subicc gr5,#0xc,gr0,icc0
- beq icc0,#0,111f
- break
- nop
-111:
-
# jump to __switch_back or ret_from_fork as appropriate
# - move prev to GR8
movgs gr4,psr


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