Messages in this thread | | | From | David Howells <> | Subject | Re: [RFC patch 08/18] cnt32_to_63 should use smp_rmb() | Date | Fri, 07 Nov 2008 23:27:59 +0000 |
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Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> wrote:
> Yes. Do you think the synchronization of the cycles counters is > _perfect_ across CPUs so that there is no possible way whatsoever that > two cycle counter values appear to go backward between CPUs ? (also > taking in account delays in __m_cnt_hi write-back...)
Given there's currently only one CPU allowed, yes, I think it's perfect:-)
It's something to re-evaluate should Panasonic decide to do SMP.
> If we expect the only correct use-case to be with readl(), I don't see > the problem with added synchronization.
It might be expensive if you don't actually want to call readl(). But that's on a par with using funky instructions to read the TSC, I guess.
David
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