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SubjectRe: [ltt-dev] LTTng 0.51, improved timestamping
disable tsc synth when ! trace clock ?
tsc synth get/put ?

amd64 :
- single cpu -> tsc_is_sync : no force on unstable tsc ?
- hotplug out all cpus, recheck



* Mathieu Desnoyers (compudj@krystal.dyndns.org) wrote:
> Hi,
>
> LTTng 0.51 for 2.6.27.4 does the following :
>
> It improves timestamping on architectures with non-synchronized TSCs in
> LTTng 0.51. I also now use per-cpu timers to do some time-related stuff
> I previously used IPIs for. It involves being more closely tied to the
> CPU hotplug callbacks.
>
> I also replaced x86 tsc_sync.c test by LTTng architecture independent
> test. (this will be posted separately on LKML for 2.6.28-rc3 tomorrow
> along with the "tracer clock" patchset).
>
> The event trap_entry, syscall_entry, irq_entry, softirq entry, exit and
> raise now use smaller fields (2 bytes), which should be enough to encode
> the IDs for all architectures. This will principally make a difference
> with non-aligned tracing for most of those events.
>
> Mathieu
>
> --
> Mathieu Desnoyers
> OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68
>
> _______________________________________________
> ltt-dev mailing list
> ltt-dev@lists.casi.polymtl.ca
> http://lists.casi.polymtl.ca/cgi-bin/mailman/listinfo/ltt-dev
>

--
Mathieu Desnoyers
OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68


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