Messages in this thread | | | Date | Tue, 18 Nov 2008 12:16:20 +0000 | From | Ralf Baechle <> | Subject | Re: [PATCH 1/1] edac x38: new MC driver module |
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On Sun, Nov 09, 2008 at 11:26:46AM -0800, Andrew Morton wrote:
> Perhaps it would be better to have a CONFIG_ARCH_HAS_READQ and to then > disable these drivers on the architectures which don't provide > readq/writeq support.
And we also need to define the exact semantics. Questions coming to mind:
o are implementations performing 2 32-bit accesses acceptable? o if so, what ordering for the two accesses is acceptable?
Ralf
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