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SubjectRe: CONFIG_PCIEASPM needed for ASPM?
On Thu, Oct 23, 2008 at 7:47 PM, Shaohua Li <shaohua.li@intel.com> wrote:
> On Fri, Oct 24, 2008 at 09:40:27AM +0800, Luis R. Rodriguez wrote:
>> I know, the question is silly right? I thought so too, but I started
>> reviewing the code and noticed most of it is just setting up values in
>> data structures for the kernel's awareness of capabilities, it also
>> updates the state in case of BIOS foobar, and there is also clock
>> retraining if possible to reduce latency. Is that it? Did I miss
>> something or is it really possible for devices to be able to use
>> L0s|L1 or L1 by just having a BIOS which does things correctly?
>>
>> That is can our devices be using ASPM without any OS interaction,
>> without CONFIG_PCIEASPM enabled?
> you didn't miss anything. If BIOS enables ASPM, even OS doesn't do anything,
> ASPM will be used.

I see, interesting... how about the clock selection and training? The
ASPM code has it, but without it will it have taken place in hardware
behind the scenes?

> ASPM enter/leave is controlled by hardware, OS just
> enables the capability.

What do you mean by the OS enabling the capability? All I see is
setting the capability bits on the pci struct so the OS can reflect
this internally and to userspace, say through lspci. Is that it?

Luis


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