Messages in this thread | | | From | Andi Kleen <> | Subject | Re: [PATCH] [5/20] x86: Introduce nsec_barrier() | Date | Thu, 3 Jan 2008 13:55:44 +0100 |
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On Thursday 03 January 2008 11:47:54 Ingo Molnar wrote: > > * Andi Kleen <ak@suse.de> wrote: > > > nsec_barrier() is a new barrier primitive that stops RDTSC speculation > > to avoid races with timer interrupts on other CPUs. > > > > Add it to all architectures. Except for x86 it is a nop right now. I > > only tested x86, but it's a very simple change. > > > > On x86 it expands either to LFENCE (for Intel CPUs) or MFENCE (for AMD > > CPUs) which stops RDTSC on all currently known microarchitectures that > > implement SSE. On CPUs without SSE there is generally no RDTSC > > speculation. > > i've picked up your rdtsc patches into x86.git but have simplified it: > there's no nsec_barrier() anymore - rdtsc() is always synchronous. > MFENCE/LFENCE is fast enough. Open-coding such barriers almost always > leads to needless trouble. Please check the next x86.git tree.
That's most likely wrong unless you added two barriers -- the barriers are strictly need to be before and after RDTSC.
I still think having the open barrier is the better approach here.
It's also useful for performance measurements because it allows a cheap way to measure a specific region with RDTSC
-Andi
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