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    SubjectRe: [PATCH]PCIE ASPM support - takes 3

    Hi!

    > v3->v2, fixed the issues Matthew Wilcox raised.
    >
    > PCI Express ASPM defines a protocol for PCI Express components in the D0
    > state to reduce Link power by placing their Links into a low power state
    > and instructing the other end of the Link to do likewise. This
    > capability allows hardware-autonomous, dynamic Link power reduction
    > beyond what is achievable by software-only controlled power management.
    > However, The device should be configured by software appropriately.
    > Enabling ASPM will save power, but will introduce device latency.

    How big is the latency? 1msec? 10msec? 100usec?

    --
    (english) http://www.livejournal.com/~pavelmachek
    (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html


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