Messages in this thread | | | Date | Wed, 19 Sep 2007 09:12:08 -0700 | From | "H. Peter Anvin" <> | Subject | Re: [patch 4/7] Immediate Values - i386 Optimization |
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Mathieu Desnoyers wrote: > > Ok, let's have a good look at what we want: > > 1 - get a pointer to the beginning of the immediate value within the > instruction. > 2 - make sure that the immediate value, within the instruction, is > written to atomically wrt all CPUs, even on older architectures > where non aligned writes are not atomic. >
I think you'll find that even on modern architectures cross-cacheline writes aren't atomic.
Anyway, disregard the bit I mentioned about one byte longer; I've been staring myself too blind at instruction variants lately (lots of arguments about how to generate various instructions using NASM syntax).
> > * 4 bytes > B8 + rd MOV r32, imm32 (1 byte opcode) > C7 /0 MOV r/m32, imm32 (2 bytes opcode) > (the 2 bytes opcode can be a problem) >
If gas generates the C7 opcodes by default, then that's a bug, nothing less.
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