Messages in this thread | | | Date | Mon, 25 Jun 2007 19:12:10 -0700 | From | "Dan Williams" <> | Subject | Re: [RFC PATCH 0/6] Convert all tasklets to workqueues |
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On 6/25/07, Steven Rostedt <rostedt@goodmis.org> wrote: > On Mon, 2007-06-25 at 18:46 -0700, Dan Williams wrote: > > > > Context switches on this platform flush the L1 cache so bouncing > > between a workqueue and the MD thread is painful. > > Why is context switches between two kernel threads flushing the L1 > cache? Is this a flaw in the ARM arch? I would think the only thing > that needs to be done between a context switch of two kernel threads (or > even a user thread to a kernel thread) is update the general regs and > stack. The memory access (page_tables or whatever ARM uses) should stay > the same. > Yes you are right, ARM does not flush L1 when prev==next in switch_mm.
> Perhaps something else is at fault here. > I'll try and dig a bit deeper... - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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