lkml.org 
[lkml]   [2007]   [Nov]   [15]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
SubjectRe: question on odd APIC behavior
Date
Am Donnerstag 15 November 2007 schrieb Maciej W. Rozycki:
> On Thu, 15 Nov 2007, Oliver Neukum wrote:
>
> > is there a way to so misprogramm an APIC that a physical interrupt results
> > in two interrupts delivered?
>
> Certainly. One possibility is to have multiple processors marked as the
> destination, e.g. a logical delivery mode destination programmed with
> multiple bits set.

What would be the consequences?
I am seeing an interrupt for an UHCI on #20 CPU1 also arriving on
#19 CPU0, triggering the spurious interrupt detection.

Regards
Oliver
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/

\
 
 \ /
  Last update: 2007-11-15 16:29    [W:0.053 / U:0.156 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site