Messages in this thread | | | Subject | Re: Flushing writes to PCI devices | From | Bryan O'Sullivan <> | Date | Thu, 21 Sep 2006 11:14:02 -0700 |
| |
On Wed, 2006-09-20 at 12:41 -0700, Bill Waddington wrote:
> Are there ever any issues with out-of-order writes from the posting > buffer on supported architectures?
Yes. If your device requires that writes to some locations in MMIO space be performed in a specific order, you must explicitly do this in your driver. Intel CPUs will flush posted writes out of order, for example.
<b
- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
| |