lkml.org 
[lkml]   [2006]   [Sep]   [19]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    Date
    From
    SubjectRe: Uses for memory barriers
    On Wed, 20 Sep 2006, Nick Piggin wrote:

    > >>(P1): If each CPU performs a series of stores to a single shared variable,
    > >> then the series of values obtained by the a given CPUs stores and
    > >> loads must be consistent with that obtained by each of the other
    > >> CPUs. It may or may not be possible to deduce a single global
    > >> order from the full set of such series.
    > >
    > >
    > > Suppose three CPUs respectively write the values 1, 2, and 3 to a single
    > > variable. Are you saying that some CPU A might see the values 1,2 (in
    > > that order), CPU B might see 2,3 (in that order), and CPU C might see 3,1
    > > (in that order)? Each CPU's view would be consistent with each of the
    > > others but there would not be any global order.
    > >
    > > Somehow I don't think that's what you intended. In general the actual
    > > situation is much messier, with some writes masking others for some CPUs
    > > in such a way that whenever two CPUs both see the same two writes, they
    > > see them in the same order. Is that all you meant to say?
    >
    > I don't think that need be the case if one of the CPUs that has written
    > the variable forwards the store to a subsequent load before it reaches
    > the cache coherency (I could be wrong here). So if that is the case, then
    > your above example would be correct.

    I don't understand your comment. Are you saying it's possible for two
    CPUs to observe the same two writes and see them occurring in opposite
    orders?

    > But if I'm wrong there, I think Paul's statement holds even if all
    > stores to a single cacheline are always instantly coherent (and thus do
    > have some global ordering). Consider a variation on your example where
    > one CPU loads 1,2 and another loads 1,3. What's the order?

    Again I don't follow. If one CPU sees 1,2 and another sees 1,3 then there
    are two possible global orderings: 1,2,3 and 1,3,2. Both are consistent
    with what each CPU sees. If a third CPU sees 2,3 then the only consistent
    ordering is 1,2,3.

    But in the example I gave there are no global orderings consistent with
    all the observations. Nevertheless, my example is isn't ruled out by what
    Paul wrote. So could my example arise on a real system?

    Alan

    -
    To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
    the body of a message to majordomo@vger.kernel.org
    More majordomo info at http://vger.kernel.org/majordomo-info.html
    Please read the FAQ at http://www.tux.org/lkml/

    \
     
     \ /
      Last update: 2006-09-19 19:43    [W:6.298 / U:0.016 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site