Messages in this thread | | | Subject | Re: [RFC] MMIO accessors & barriers documentation | From | Benjamin Herrenschmidt <> | Date | Tue, 12 Sep 2006 15:48:02 +1000 |
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> > 4- io_to_lock_wb() : This barrier provides ordering requirement #4 > > between an MMIO store and a subsequent spin_unlock(). It can be used in > > conjunction with write accessors of Class 2 and 3. > > These can really multiply: read or write, RAM and various types > of IO space, etc.
No they can't. They are not dependent on the bus type but on the processor memory model. Only 4 might have some more annoying dependencies but in practice, it's still manageable. I think I've defined the 4 base rules that are useful for drivers and the barriers that provide them. Unless you can show me an example where something else is needed.
> Let's have a generic arch-provided macro and let gcc do some work > for us. > > Example usage: > fence(FENCE_READ_RAM|FENCE_READ_PCI_IO, FENCE_WRITE_PCI_MMIO);
<snip>
That's terribly ugly imho.
Ben.
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