Messages in this thread | | | From | Andi Kleen <> | Subject | Re: [discuss] Re: [PATCH for 2.6.18] [2/8] x86_64: On Intel systems when CPU has C3 don't use TSC | Date | Tue, 1 Aug 2006 23:56:52 +0200 |
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On Tuesday 01 August 2006 23:40, Sergio Monteiro Basto wrote: > On Tue, 2006-08-01 at 19:10 +0200, Andi Kleen wrote: > > > I had some faith in this patch , but this just enable boot parameter > > > notsc (which I already use). And "just" disable tsc don't solve all > > the > > > problems. > > > > What problems do you have? > > > Hi Andi , > if I boot without notsc , I have many lost timer tickets.
Lost timer ticks print a rip. Do you have some samples?
Anyways, for a single socket Intel dual core TSCs should be definitely synced so I don't know what could be wrong on your system. Please post full boot.msg at least.
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