Messages in this thread | | | Date | Thu, 30 Mar 2006 17:09:28 -0800 (PST) | From | Christoph Lameter <> | Subject | RE: Synchronizing Bit operations V2 |
| |
On Thu, 30 Mar 2006, Chen, Kenneth W wrote:
> > > I know, I'm saying since it doesn't make any difference from API point of > > > view whether it is acq, rel, or no ordering, then just make them rel as a > > > "preferred" Operation on ia64. > > > > That would make the behavior of clear_bit different from other bitops and > > references to volatile pointers. I'd like to have this as consistent as > > possible. > > Yeah, but we just agreed that caller shouldn't be thinking clear_bit has > memory ordering at all.
In general yes the caller should not be thinking about clear_bit having any memory ordering at all. However for IA64 arch specific code the bit operations must have a certain ordering semantic and it would be best that these are also consistent. clear_bit is not a lock operation and may f.e. be used for locking something. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
| |