Messages in this thread | | | Date | Tue, 28 Feb 2006 12:58:38 -0500 | From | Benjamin LaHaise <> | Subject | Re: [PATCH] Define wc_wmb, a write barrier for PCI write combining |
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On Tue, Feb 28, 2006 at 09:50:08AM -0800, Bryan O'Sullivan wrote: > The last 32-bit write triggers the chip to put the packet on the wire. > We make sure it happens after the earlier bulk write using a barrier.
The barrier you're looking for is wmb() in asm/system.h, which is defined on both SMP and UP. On x86 you do not need the sfence as writes will show up on the bus in program order, but you do need wmb() to prevent gcc from reordering your code. Adding a new primative only makes things slower as the sfence isn't necessary most of the time (it rightly has a dependancy on CONFIG_UNORDERED_IO, which the jury is still out on).
-ben -- "Ladies and gentlemen, I'm sorry to interrupt, but the police are here and they've asked us to stop the party." Don't Email: <dont@kvack.org>. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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