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SubjectRE: [PATCH] sata_nv ADMA/NCQ support for nForce4 (v7)
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> Another update to this patch, now version 7. This greatly 
> simplifies the
> interrupt handler and gets rid of some of the weird code
> relating to the
> notifier clear registers (as well as a potential uninitialized value
> usage that was in version 6). There still seems to be the
> need to do a
> notifier clear in the interrupt handler even when the notifiers are
> empty. I'm not sure why that is, it would be nice to get some
> input from
> NVIDIA or those with the hardware specs as to what writing values
> (including zero values) to the notifier clear registers actually does.

You always have to write both notifiers even if one is 0, no interrupt
ack takes place until both are written.

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