Messages in this thread | | | Date | Tue, 12 Jul 2005 17:02:13 -0700 (PDT) | From | William Weston <> | Subject | Re: Real-Time Preemption, -RT-2.6.12-final-V0.7.50-24 |
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On Tue, 12 Jul 2005, Ingo Molnar wrote:
> * K.R. Foley <kr@cybsft.com> wrote: > > > Is this why I have been able to boot the latest versions without the > > noapic option (and without noticeable keyboard repeat problems) or has > > it just been dumb luck? > > yes, i think it's related - the IO-APIC code is now more robust than > ever, and that's why any known-broken system would be important to > re-check.
Just brought the SIS based Xeon box up on -51-28 with CONFIG_IOAPIC_FAST and without the noapic option, and all is well. On -50-43, noapic was needed to avoid the spurious interrupt and APIC error on CPU0 messages.
Are there any non-SIS chipsets out there that need the sis_apic_bug checks? What about IOAPIC_POSTFLUSH?
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