Messages in this thread | | | Date | Wed, 27 Apr 2005 22:56:55 -0700 | From | Greg KH <> | Subject | Re: Deferred handling of writes to /proc/irq/xx/smp_affinity |
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On Wed, Apr 27, 2005 at 10:15:38PM -0700, Ashok Raj wrote: > Hi Andrew and all > > It is safe to re-program rte entries in ioapic only when an intr is pending. > Existing code does this incorrectly by reprogamming rte entries immediatly > when a value is written to /proc/irq/xx/smp_affinity. IRQ_BALANCE code in > kernel does this right, but /proc/irq needs to be handled the same way so that > user mode irq_balancer wont lock up systems or loose interrupts in the race. > > This is already fixed in ia64, introduced for i386 and x86_64. > > since this touches 3 arch's managing in -mm for trial would be best to make > sure nothing is broken, before considering for main line.
The pci/msi stuff looks fine with me, as long as you've tested it out (I have no msi hardware...)
thanks,
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