Messages in this thread | | | Date | Sat, 7 Aug 2004 01:13:11 -0700 | From | William Lee Irwin III <> | Subject | Re: Hugetlb demanding paging for -mm tree |
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On Fri, Aug 06, 2004 at 02:07:50PM -0700, William Lee Irwin III wrote: > update_mmu_cache() does not appear to check the size of the translation > to be established in many architectures. e.g. on arch/ia64/ it does > flush_icache_range(addr, addr + PAGE_SIZE) unconditionally, and only > sets PG_arch_1 on a single struct page. Similar comments apply to > sparc64 and ppc64; I didn't check any others.
In general not much seems to be getting done about cache coherency in hugetlb at all. This may be problematic even in mainline.
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