Messages in this thread | | | Subject | Re: 4k stacks in 2.6 | From | Arjan van de Ven <> | Date | Tue, 08 Jun 2004 08:26:25 +0200 |
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> That gave me an idea. Sometimes in chip design, we 'overconstrain' the > logic synthesizer, because static timing analyzers often produce > inaccurate results. Anyhow, what if we were to go to 4K stacks but in > static code analysis, flag anything which uses more than 2K or even 1K?
the patch I sent to akpm went to 400 bytes actually, but yeah, even that already is debatable. [unhandled content-type:application/pgp-signature]
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