Messages in this thread | | | Date | Sat, 1 May 2004 04:02:20 +0200 | From | Andi Kleen <> | Subject | Re: [BUG] 2.6.6-rc2-bk5 mm/slab.c change broke x86-64 SMP |
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On Fri, Apr 30, 2004 at 07:01:02PM -0700, Andrew Morton wrote: > Andi Kleen <ak@suse.de> wrote: > > > > > Does this fix? > > > > > > diff -puN include/asm-x86_64/processor.h~a include/asm-x86_64/processor.h > > > --- 25/include/asm-x86_64/processor.h~a Fri Apr 30 11:24:58 2004 > > > +++ 25-akpm/include/asm-x86_64/processor.h Fri Apr 30 11:25:28 2004 > > > @@ -20,6 +20,8 @@ > > > #include <asm/mmsegment.h> > > > #include <linux/personality.h> > > > > > > +#define ARCH_MIN_TASKALIGN L1_CACHE_BYTES > > > > 16 should be enough actually. The problem is the FXSAVE instruction that > > is used to switch the FPU state, and that only requires 16 byte alignment. > > > > yup. I sent Linus the patch which changes the default from 0 to > L1_CACHE_SIZE in kernel/fork.c. x86_64 can override that by setting > ARCH_MIN_TASKALIGN to 16 in asm/processor.h
Ok, I will change it in my next patchkit.
For i386 it is the same - 16 should be enough.
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