Messages in this thread | | | Date | Fri, 5 Sep 2003 23:24:20 +0200 | From | Pavel Machek <> | Subject | Re: x86, ARM, PARISC, PPC, MIPS and Sparc folks please run this |
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Hi!
> > In x86 store buffer is not snooped which leads to all these serialization > > issues (other CPUs looking at stale value of data which is in the store > > buffer of some other CPU). > > x86 gives you coherency and store ordering (barring errata and special > CPU modes)
Special CPU modes? You mean some special SSE stores? Pavel
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