Messages in this thread | | | Date | Tue, 15 Jul 2003 23:30:34 -0700 | From | "David S. Miller" <> | Subject | Re: [patch] e1000 TSO parameter |
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On Tue, 15 Jul 2003 23:32:48 -0700 David Mosberger <davidm@napali.hpl.hp.com> wrote:
> DaveM> No, I mean "bypass L2 cache on miss" for stores. Don't tell > DaveM> me IA64 doesn't have that? 8) I certainly didn't mean "always > DaveM> bypass L2 cache" for stores :-) > > What I'm saying is that I almost always want copy_user() to put the > destination data in the cache, even if it isn't cached yet.
No you don't :-)
If you miss, you do a bypass to main memory. Then when the app asks for the data (if it even does at all, consider that) it get's a clean copy in it's L2 cache.
Overall it's more efficient this way.
> Many copy_user() calls are for for data structures that > easily fit in the cache and the data is usually used quickly afterwards.
Absolutely correct. We can't use the cache bypass-on-miss stores on sparc64 unless the copy is at least a couple of cachelines in size.
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