Messages in this thread | | | Subject | Re: PCI cache line messages 2.4/2.5 | From | "David S. Miller" <> | Date | 05 Jun 2003 04:05:58 -0700 |
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On Thu, 2003-06-05 at 03:39, Alan Cox wrote: > > Your BIOS did not set the PCI cache line size correctly. The kernel > > caught that mistake, and fixed it. > > I can't find anywhere the BIOS is obliged to set it for you if a PnP OS > is installed, ditto in the presence of any form of hotplug the test is > wrong. > > As far as I can see you can only warn if MWI is already set in the > control word, and (I'd have to check the spec) possibly if the > cache line size is non zero.
I don't know how PnP OS plays into it, but the last time I dug into this deep dark area, the BIOS was expected to setup the cache line size for all PCI devices in the system.
I do specifically remember situations, involving Acenic cards, where one Acenic card would have things setup correctly but for whatever reason the BIOS decided not to init the other Acenic cards.
-- David S. Miller <davem@redhat.com> - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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