Messages in this thread | | | Date | Fri, 13 Jun 2003 16:52:50 -0700 (PDT) | Subject | Re: e1000 performance hack for ppc64 (Power4) | From | "David S. Miller" <> |
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From: "Feldman, Scott" <scott.feldman@intel.com> Date: Fri, 13 Jun 2003 16:52:18 -0700
> > Why not instead find out if it's possible to have the e1000 > > fetch the entire cache line where the first byte of the > > packet resides? Even ancient designes like SunHME do that. > > Rusty and I were wondering why the e1000 didnt do that exact thing. > > Scott: is it possible to enable such a thing? I thought the answer was no, so I double checked with a couple of hardware guys, and the answer is still no.
Sigh...
So Anton, when the PCI controller gets a set of sub-cacheline word reads from the device, it reads the value from memory once for every one of those words? ROFL, if so... I can't believe they wouldn't put caches on the PCI controller for this, at least a one-behind that snoops the bus :( - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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