Messages in this thread | | | Date | Wed, 21 May 2003 15:30:11 -0700 (PDT) | From | Davide Libenzi <> | Subject | Re: SIS650+CPQ Presario 3045US details ... |
| |
On Wed, 21 May 2003, Martin Diehl wrote:
> On Tue, 20 May 2003, Davide Libenzi wrote: > > > Below are reported details about my CPQ Presario 3045US with the new > > SIS650 chipset. I report how I changed the IRW routing functions, that > > makes my machine to work fine. I did that completely blindly since I > > couldn't find specs for the SIS650 chipset (Intel and AMD rulez about > > docs). As you can see both 0x6* and 0x4* requests are generated by the PCI > > world. > > As already said, taken this way it has the potential to break older SiS > routing stuff.
You can likely do 's/potential/certainty/' here. The code reported work for my machine with that chipset, like I said before. Checking the rev-id will make probably the code to work with both old and new revisions. But again, w/out docs (and SIS web site sucks at least for this) we're just trolling here.
- Davide
- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
| |