Messages in this thread | ![/](/images/icornerl.gif) | | Date | Mon, 21 Apr 2003 14:04:48 -0700 (PDT) | From | Linus Torvalds <> | Subject | Re: [PATCH] Runtime memory barrier patching |
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On Mon, 21 Apr 2003, Andi Kleen wrote: > > Ok fixed. I used the recommendations from the Hammer optimization > manual, will hopefully work for Intel too.
They may _work_ for intel, but quite frankly they suck for most Intel (and probably non-intel too) CPU's. Using prefixes tends to almost always mess up the instruction decoders on most CPU's out there.
I _think_ most Intel chips have one generic decoder (which knows about prefixes etc), and the rest only handle simple instructions.
Intel has some preferred sequence that I'd much rather use by default, although we can obviously use a CONFIG_xxx option to switch between these sequences.
I forget what the intel sequence is, but I think the multi-byte opcodes are something like "lea 0(%esi),%esi" rather than adding operand size prefixes to the nop.
Does anybody have the preferred Intel sequence somewhere?
Linus
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