Messages in this thread | ![/](/images/icornerl.gif) | | Date | Thu, 27 Feb 2003 13:14:06 +0100 | From | Ingo Oeser <> | Subject | Re: Tighten up serverworks workaround. |
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Hello there,
On Wed, Feb 26, 2003 at 10:47:52AM -0800, Jonathan Lundell wrote: > At 1:03pm -0500 2/26/03, Alan Cox wrote: > > > How can e help? Please give me a configuration and how the bug manifests > >> inself. > > > >OSB4 chipset system, some memory areas marked write combining with the > >processor memory type range registers. A long time ago Dell (I > >think) reported corruption from this and submitted changes to block the > >use of write combining on OSB4. The question has arisen as to whether > >thats a known thing, and if so which release of the chipset fixed it so that > >people can only apply such a restriction to problem cases not all OSB4. > > Presumably we're talking about CNB30 (the north bridge) rather than > OSB4 (the south bridge).
No it's about CNB20LE. I'm one of the low performance victims. And this is an ASUS board (CUR-DLS) (which proved not worth its prices recently).
Regards
Ingo Oeser -- Science is what we can tell a computer. Art is everything else. --- D.E.Knuth - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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