Messages in this thread | ![/](/images/icornerl.gif) | | Date | Tue, 9 Dec 2003 16:20:27 +0100 (CET) | From | "Maciej W. Rozycki" <> | Subject | Re: Fixes for nforce2 hard lockup, apic, io-apic, udma133 covered |
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On Sun, 7 Dec 2003, Ross Dickson wrote:
> b) I was also disappointed to see I could not have irq0 timer IO-APIC-edge. > So I have fixed it too (tested on both my epox and albatron MOBOs). > Firstly I found 8254 connected directly to pin 0 not pin 2 of io-apic. > I have modified check_timer() in io_apic.c to trial connect pin and test for it > after the existing test for connection to io-apic.
I'm pretty sure this part is bogus. Have you actually verified it either by using a hardware probe or at least by investigating documentation you really have IRQ 0 routed to the I/O APIC interrupt #0 (INTIN 0)? If no, then you can almost surely see interrupts travelling across the pair of 8259A PICS which are connected to the INTIN 0 input of the first I/O APIC in every IA32-based PC system providing an I/O APIC seen so far.
-- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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