Messages in this thread | | | Date | Thu, 30 May 2002 13:35:55 -0700 (PDT) | Subject | Re: is pci_alloc_consistent() really consistent on a pentium? | From | "David S. Miller" <> |
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From: William Chow <lilbilchow@yahoo.com> Date: Thu, 30 May 2002 13:44:06 -0700 (PDT)
If IA32 builds use the i386 version of pci_alloc_consistent(), how is the memory provided by this function really write-thru (on a pentium) since it appears to only set up the default mapping (PCD/PWT==0)? In contrast, pgprot_noncached() and pci_mmap_page_range() explicitly set these bits on a pentium (i.e. when boot_cpu_data.x86 > 3). Or am I missing something?
pci_mmap_page_range maps I/O memory, like frame buffers and device registers.
pci_alloc_consistent promises only that CPU writes will be coherent with PCI device DMA activity. For Pentium this holds true with all normal ram, because once the cpu does the store coherent transactions on the system bus (from, for example, the PCI device) will take a hit on the L2 cache line of the cpu and thus the cpu will provide the most up to date copy of the data. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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