Messages in this thread | | | From | Daniel Phillips <> | Subject | Re: Bug: Discontigmem virt_to_page() [Alpha,ARM,Mips64?] | Date | Wed, 1 May 2002 03:35:20 +0200 |
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On Thursday 02 May 2002 02:20, Anton Blanchard wrote: > > so ia64 is one of those archs with a ram layout with huge holes in the > > middle of the ram of the nodes? I'd be curious to know what's the > > hardware advantage of designing the ram layout in such a way, compared > > to all other numa archs that I deal with. Also if you know other archs > > with huge holes in the middle of the ram of the nodes I'd be curious to > > know about them too. thanks for the interesting info! > > From arch/ppc64/kernel/iSeries_setup.c: > > * The iSeries may have very large memories ( > 128 GB ) and a partition > * may get memory in "chunks" that may be anywhere in the 2**52 real > * address space. The chunks are 256K in size. > > Also check out CONFIG_MSCHUNKS code and see why I'd love to see a generic > solution to this problem.
Using the config_nonlinear model, you'd change the four mapping functions:
logical_to_phys phys_to_logical pagenum_to_phys phys_to_pagenum
to use a hash table instead of a table lookup. Bill Irwin suggested a btree would work here as well.
(Note I'm trying out the term 'pagenum' instead of 'ordinal' here, following comments on lse-tech.)
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