Messages in this thread | | | Date | Mon, 30 Apr 2001 07:56:03 -0700 | From | Jonathan Lundell <> | Subject | Re: X15 alpha release: as fast as TUX but in user space (fwd) |
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At 12:29 AM -0700 2001-04-30, H. Peter Anvin wrote: >"David S. Miller" wrote: >> >> dean gaudet writes: >> > i was kind of solving a different problem with the code page >>though -- the >> > ability to use rdtsc on SMP boxes with processors of varying speeds and >> > synchronizations. >> >> A better way to solve that problem is the way UltraSPARC-III do and >> future ia64 systems will, by way of a "system tick" register which >> increments at a constant rate regardless of how the cpus are clocked. >> >> The "system tick" pulse goes into the processor, so it's still a local >> cpu register being accessed. Think of it as a system bus clock cycle >> counter. >> >> Granted, you probably couldn't make changes to the hardware you were >> working on at the time :-) >> > >RDTSC in Crusoe processors does basically this. > > -hpa
The Pentium III TSC has the bizarre characteristic, per Intel docs anyway, that only the low half can be written (as I recall the high half gets set to zero), making restoration problematical in certain power-management regimes. Hopefully the Crusoe does better. -- /Jonathan Lundell. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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