Messages in this thread | | | Date | Wed, 8 Mar 2000 20:04:56 -0700 | From | yodaiken@fsmlabs ... | Subject | Re: new IRQ scalability changes in 2.3.48 |
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On Wed, Mar 08, 2000 at 06:44:51PM -0800, Linus Torvalds wrote: > > > On Wed, 8 Mar 2000 yodaiken@fsmlabs.com wrote: > > On a UP -- no change except code is more complex > > On a SMP box performance loss without using affinity. > > Take two spinlocks instead of one, more cache boucing etc. > > You've said that now several times, and you always ignore the answer that > you are always given: normally you don't need any other spinlock if your > interrupt controller can do the operations atomically. Which they actually > usually can, at least the better ones. > > Ignoring that answer only makes you look silly. Don't do it.
The way you are getting an atomic operation on the level irqs is by splitting it into two parts: unless I'm mistaken about it. So the performance loss comes from the io-apic being frozen until the interrupt handler returns and does a desc-end You avoid the second spin lock by freezing the io-apic
Is that false?
-- --------------------------------------------------------- Victor Yodaiken FSMLabs: www.fsmlabs.com www.rtlinux.com FSMLabs is a servicemark and a service of VJY Associates L.L.C, New Mexico.
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