Messages in this thread | | | From | davej@suse ... | Date | Fri, 10 Nov 2000 19:49:52 +0000 (GMT) | Subject | Re: [Fwd: CPU detection revamp (Request for comments)] |
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On Fri, 10 Nov 2000, Brian Gerst wrote:
> > features : fpu vme de pse tsc msr mce cx8 pge mmx syscall 3dnow > > The K6's don't support sysenter/sysexit.
The K6 datasheets suggests otherwise. Some models seem to have sysenter/sysexit, whilst others have syscall/sysret. No model seems to have both.
The datasheets are somewhat confusing, as it doesn't mention bit 10 at all, just an oversized box for bit 11.
> It really should have been marked differently before.
Before we weren't mentioning it at all, look.. flags : fpu vme de pse tsc msr mce cx8 sep mtrr pge mmx 3dnow
> The early K6's used extended bit 10 to indicate syscall/sysret > capabality, but this version has some quirks that make it pretty much > unusable. Later K6's use extended bit 11 to indicate syscall/sysret.
And where does sysenter/sysexit fit in?
regards,
Davej.
-- | Dave Jones <davej@suse.de> http://www.suse.de/~davej | SuSE Labs
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