Messages in this thread | | | Subject | Re: New resources - pls, explain :-( | From | Jes Sorensen <> | Date | 17 Aug 1999 09:36:32 +0200 |
| |
>>>>> "Peter" == Peter Desnoyers <pjd@fred001.dynip.com> writes:
Peter> I'm still confused. PCI is cache-coherent w.r.t. DMA by the Peter> spec, but not on UltraSparcs, and maybe not sometimes on Cyrix. Peter> It doesn't define memory ordering - the most common platform is Peter> strictly ordered, while others (UltraSparc, yet again) have Peter> selectable looser ordering. The address space is sparse for Peter> non-word access on Alphas, and non-sparse in all other cases Peter> that I know. Although it defines separate IO and memory Peter> spaces, the IO space will be memory mapped on most platform Peter> types. (It could be on the x86, as well, if someone insane Peter> enough made a chipset to do it...)
The PCI bus is non cache coherent on some ARM boxes.
Peter> As far as I can tell, SBus and NuBus are subsets of these Peter> possible semantics. The biggest difference I can think of, Peter> compared to PCI/ISA/ MCA/EISA, is that they both have Peter> well-defined per-card config ROM specs, and the per-slot Peter> address spaces in NuBus. (or do you mean that SBus and NuBus Peter> have much stricter semantics, and so should not fall in the PCI Peter> framework?)
What I am after here is that on some busses, like SBUS, you need to do certain setups before doing DMA's etc. The issue here is that you could in principle have a two different buses in a machine, for instance one which is sparse and one which is not.
Peter> For that matter, I don't think cache coherency affects Peter> readl/writel semantics - it affects the sequence of actions a Peter> driver must take to ensure that the CPU reads the correct value Peter> out of *motherboard* memory, not over the bus. The non-endian Peter> stuff that's been kicked around in this thread has mostly been Peter> memory ordering and barriers, not cache coherency.
Oh yes cache coherency matters very much here if you want the drivers to work on the ARM boxes.
Jes
- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.rutgers.edu Please read the FAQ at http://www.tux.org/lkml/
| |