Messages in this thread | | | Date | Tue, 13 Apr 1999 16:48:12 +0000 | From | Don Fisher <> | Subject | Re: CPU affinity |
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Benedict Bridgewater wrote: > > I need deterministic performance. I can control things on a single processor > by using SCHED_FIFO, but want to carry this level of control over to SMP. > > I'm processing video (bttv - DMA) and 8KHz sound data, so interrupts arn't > really an issue. But I am doing *heavy* processing, and my application > requires to be as time sensitive as possible, so I really can't afford to have > the scheduler 2nd guessing me when I move to SMP. > > Ben >
I am also doing video processing. And I have Xeons with 2Mb of cache. The entire accumulated image result can/will live in the L2 cache. If I change cpu's, don't I loose the benefit of having the large (and expensive) L2 cache?
don -- ------------------------------------------------------------------- | Don Fisher dfisher@as.arizona.edu | | MMT Observatory VOICE: (520)621-7647 | | University of Arizona FAX: (520)670-5740 | | Tucson, AZ 85721 | -------------------------------------------------------------------
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