Messages in this thread | | | Date | Tue, 9 Mar 1999 16:35:30 +1300 | From | Chris Wedgwood <> | Subject | Re: Linux/IA-64 byte order |
| |
On Mon, Mar 08, 1999 at 06:02:47PM -0800, David Miller wrote:
> Actually, besides my per-load/store endianness selection, there is > another scheme (supported on UltraSparc, could be supported by IA-64, > I don't know). > > There are often endianness selection bits in the page table entries, > add a new flag to mmap, and voila.
That is way cool IMO... it will be interesting to see what future Sparc chips will be like once the Merced is `available' and now that Sun have said they will open up the Sparc architecture somewhat.
-cw
- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.rutgers.edu Please read the FAQ at http://www.tux.org/lkml/
| |