Messages in this thread | | | Date | Thu, 25 Feb 1999 09:30:08 +0100 (CET) | From | Ingo Molnar <> | Subject | Re: RFD: nanoseconds, rdtsc and SMP |
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On Thu, 25 Feb 1999, Ulrich Windl wrote:
> The question is: "what assumptions can be made?" On the i386 > architecture, will all cycle counters start at the same moment, and > will they be bound to the same oscillator? If not one has to > calibrate each CPU, and remember the cycle counter of each CPU during > timer interrupt. When getting the time one must find the cycle > counter of the own CPU and subtract that counter at the last > interrupt to get the difference. Other architectures maybe even worse.
the newest SMP patch does exactly this. _Most_ boards have synchron cycle counters, but not all ... We explicitly synchronize the cycle counters at early bootup time. So i think you should safely assume that they are synchron.
> Colin Plumb suggested to synchronize the cycle counters on i386 > architecture, assuming they'll remain in sync. This would make the > time code much easier, but break things terrible, if the counters
(yep, i've implemented this after Colin proved via user-space tools that some systems are not synchron.) Also, it's guaranteed that the CPUs stay synchron once synchronized.
-- mingo
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