Messages in this thread | | | Subject | Re: trampoline question | Date | Tue, 30 Nov 1999 18:16:07 +0000 (GMT) | From | Alan Cox <> |
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> I tried to further clean up the i386 trampoline code, and I found 2 > weird lines:
This is from 2.0 days I think
> 2) arch/i386/kernel/head.S enables the 4 MB page tables twice: > > around line 65, the secondary cpu loads the cr4 value from the primary > cpu, and around line 220 it unconditionally enables 4 MB page tables.
On 2.0.x this was neccessry because the page tables preset for us had 4Mb entries and an SMP box would burn if they were not set.
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